Diploma thesis finally done!

Sorry for taking so long to translate it to English. I am sure there will be some language and format mistakes, but I did the best I could. Enjoy!

Callibration ladder board testing...

This video shows the testing procedure of a calibration ladder card, which constitutes one bit of the suggested D/A converter system. The program written in VB6 illustrates the transfer curve (digital input -X axis and current ouput-Y axis). More information can be found in chapter 6!
P.S. If the video is messy, try viewing from here

Chapter7 is out!

The last chapter showing the idea of a DIPA (Dual Input Phase Acummulator) used for fast hardware calibration of the Mosfet R-2R ladder-based D/A converter.
Download here

Fresh new Chapter 6!

This chapter explains in detail the implemented hardware.
Download here

Chapter 5 is out!

Chapter 5 elaborates on the design of a MOSFET-only R-2R calibrated architecture for improved DAC performance.
Download here

Chapter 4

This chapter explains in detail ( to the best of my abilities at least) the idea and the benefits of the proposed architecture.
Download here

Chapter 3 out!

Check out chapter 3
download here

Chapter 2 out fresh!

Despite some minor setbacks, here's chapter 2:
Download from here

Introduction

As promised, I started working on the short English version of my thesis, which covers in detail the innovative R-2R digitally calibrated DAC, but omits many of the theoretical jargon on A/D and D/A converters.

So far, I have managed to complete the introductory chapter, so that everyone can understand fairly well the application of the circuit I am about to elaborate on in my work.
download here

R-2R calibrated thesis coming up!

Sorry I've been absent for so long (more than a year), but I was finishing my diploma thesis on the R-2R calibrated DAC. I am beginning the translation of my work to English theses days, so stay tuned for new interesting material!